What is FPGA?
This page describes FPGA, its applications,benefits,development tools,fpga code development steps. FPGA stands for Field Programmable Gate Array. The most common FPGA architecture consists of an array of logic blocks called Configurable Logic Block or CLB, I/O pads, and routing channels. In general, a logic block i.e. CLB consists of a few logical cells called ALM, LE and Slice etc. A typical cell consists of a 4-input Lookup table (LUT), a Full adder (FA) and a D-type flip-flop. FPGA is mainly composed of LUT, MUX and FF. To understand what FPGA capabilities are let us understand its benefits,applications and tools.
Benefits
FPGA's are more popular now-a-days in a rapidly changing technology environment because of its following features.
• Easy portability of algorithms and provision to re-program if algorithm or technology changes in the future without change of hardware which is built only once at the start of equipment.
• Faster Input and Output response times.
• Better than DSP for faster execution of the functionality
• Good for prototyping for ASIC design which will reduce cost for re-design and maintenance of ASIC development.
Applications
Mainly used for porting of IP cores or algorithms in the field of embedded. It is not restricted to particular engineering field but is used for almost all including mechanical, electrical and wireless domain.
Example- Xilinx virtex-5 FPGA
Virtex-5 FPGAs consists of hardwired IP system level blocks as mentioned here for example, 36-Kbit block RAM/FIFOs, 25 x 18 DSP slices, Select IO™ technology with built-in digital controllable impedance and Chip Sync™ source synchronous interface blocks and system monitor functionality, enhanced clock management tiles along with integrated Digital Clock Managers and PLL clock generators and advanced configuration options. The Virtex-5 LXT, SXT, TXT, and FXT platforms include advanced high-speed serial connectivity and link/transaction layer capability. Typical Xilinx FPGA will have resources such as CLBs,DSP slices,Block RAM blocks,CMTs,PowerPC processor blocks, Ethernet MACs,Total I/O Banks,User I/O.
FPGA Development Tools
Any algorithm that needs to be ported on the FPGA is developed in VHDL or
Verilog language similar to other programming languages. These languages are
mainly designed for hardware portability/configurability.
1. MODEL SIM : Used for functionality verification
2. XILINX ISE: Used for synthesis
3. Synplify pro: Used for synthesis
4. Lionardo spectrum: Used for synthesis
Steps of for VHDL/verilog Code development
Step 1: Requirement -> VHDL (or Verilog) Code -> Simulate using Model SIM and check for functionality
Step 2: Verified VHDL or verilog code is passed to Synthesis Tool (2/3 or 4) mentioned above to generate optimized Gate level model
Step 3: Pass optimized Gate level model for "Place and Route" to generate "timing model" which will meet timing constraint.
Step 4: Load bit file on FPGA and GDSII file load on ASIC generated after step3. Loaders or FPGA programmers are available which can be interfaced with PC using JTEG cable
This page explains what is a FPGA chip and provides useful links.
Useful Links
FPGA kit- This page covers FPGA development board/kit manufacturers.
FPGA architecture basicsRefer Page
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